PAL16L8
JLB/CJTC 15AUG86
44303B,2C,LBC2 - LOCAL DATA BUS CONTROL PAL

/CACT /CGNT /EADR /BINPUT50 MISO /IOD WRITE TEST NC9 GND
/BACT /WLBD NC13 NC14 NC15 NC16 /CMWRITE /CBWRITE /WBD VCC

; LBD TO BD TRANSCEIVER
; ---------------------
 

; WBD - DIRECTION FROM LBD TO BD

IF (/TEST) WBD = EADR                   ; ADDRESS FROM CPU TO BUS.
            + CBWRITE                   ; CPU WRITE CYCLE TO BUS
            + IOD * MISO * /BINPUT50    ; OUTPUT PART OF IOX
            + BACT                      ; DMA OUTPUT CYCLE

; (CBWRITE) - CPU TO BUS WRITE. STARTS ONLY WHEN THE BUS IS GRANTED.
;             LASTS UNTIL THE END OF THE BUS CYCLE.

IF (/TEST) CBWRITE = WRITE * CACT
                + CBWRITE * CACT

; CD TO LBD TRANSCEIVER
; ---------------------
 

; WLBD - DIRECTION FROM CD TO LBD

IF (/TEST) WLBD = CBWRITE               ; CPU WRITE CYCLE TO BUS
            + CMWRITE                   ; CPU WRITE CYCLE TO LOCAL MEMORY
            + IOD * MISO * /BINPUT50    ; OUTPUT PART OF IOX

; (CMWRITE) - CPU WRITE TO LOCAL MEMORY. LASTS UNTIL END OF MEMORY CYCLE
;             ON BUFFERED WRITE.

IF (/TEST) CMWRITE = WRITE * CGNT
                + CMWRITE * CGNT

DESCRIPTION

; 180587 - 3202B
; 070887 JLB: 3202C ONLY ! (TEST MODE).