PAL16L8
CJTC 02SEP86
44304E,1C,LBC3 - LOCAL DATA BUS CONTROL PAL

/CGNT /BGNT /BGNT50 /MWRITE /BDAP50 /EBUS /IBAPR /GNT TEST GND
NC11 NC12 /EBD CLKBD SAPR FAPR EBADR /BACT DBAPR VCC

; BACT - BUS ACTIVITY. LASTS FOR COMPLETE DMA TO LOCAL MEMORY
; CYCLE (ONLY ON MEMORY READ)

IF (/TEST) BACT = BGNT50 * /MWRITE  ; ENABLE FOR DATA ONLY AFTER ADDRESS
                + BACT * BDAP50     ; HOLD AFTER BDAP FINISHED

; EBD - ENABLE BUS DATA. ENABLE LBD TO BD TRANSCEIVER
; SHOULD BE DISABLED DURING CGNT * /BACT, IE DISABLE WHEN CPU
; IS ACCESSING LOCAL MEMORY, EXCEPT WHEN TRANSCEIVER IS BEING USED
; AS A REGISTER TO HOLD DATA FROM A PREVIOUS DMA MEMORY READ.

IF (/TEST) EBD = EBUS * /CGNT * /GNT
                + EBUS * BGNT
                + EBUS * BACT

; EBADR - ENABLE ADDRESS FROM BUS TO LOCAL MEMORY

IF (/TEST) /EBADR = /GNT * /BGNT        ;TURN ON AT BAPR WITH GNT
                + /IBAPR * /EBADR       ;HOLD UNTIL BGNT AND GNT BOTH GONE
                + /GNT * /EBADR

; SLOW INVERSION

IF (/TEST) /FAPR = /IBAPR
IF (/TEST) /SAPR = /FAPR
IF (/TEST) /DBAPR = /SAPR

; CLOCK PULSE TO 648'S.

IF (/TEST) /CLKBD = /SAPR * /BGNT50 ; CLOCK ADDRESSES ON DELAYED BAPR.
                + /SAPR * /BDAP50 ; CLOCK DATA 50NS AFTER START OF
                + /SAPR * /MWRITE ; BGNT * BDAP ON MEMORY WRITES FROM DMA.
DESCRIPTION

; 200387 CJTC:      NEED TO SLOW DOWN APR TO AS648 BUS TCVRS. PUT IT
;                   THROUGH THIS PAL INSTEAD OF F04
; 200387 JLB:       EBADR COMES ON AT BAPR TO AVOID SPIKE ON LBD.
; NEW INPUT CGNT
; 230387 JLB:       APR DELAYED 3XPAL DELAY
; 240387 JLB:       EBD MUST NOT CHANGE WHEN DATA IS CLOCKED IN.
;
; 180587 - 3202B
; 310787 JLB:       BUFFERED DMA WRITE: CLOCK DATA IN 648'S ALSO.

; 040887 JLB:       BUFFERED DMA WRITE: NEED TO ENABLE THE REGISTER IN THE
;                   648'S FOR THE PERIOD OF BGNT.
; 060887 D JLB:     EBADR CHANGED TO MAKE BUFFERED DMA WRITE WORK.
; 090887 E JLB:     TEST MODE FOR C-PRINT.