PAL16L8 JLB 26NOV86 44306A,21G,MMUCTL CA0 WRITE /DVACC /RT /WCHIM DOUBLE /EMCL /CC2 /WCA GND LSHADOW /LAPA /EPT /EPMAP /EPTI /EIPL /EIPU /EIPUR /ECD VCC ; MEMORY MANAGEMENT CONTROL IF (VCC) ECD = WCA * /LSHADOW ; DISABLE CACHE ON SHADOW ACCESSES + RT * /LSHADOW * /CC2 ; ENABLE WHEN WRITING IN CACHE ; ENABLE IN THE FIRST PART OF READ/FETCH CYCLES IF (VCC) LAPA = DVACC * /LSHADOW * /WCHIM ; LA TO PPN WHEN VIRTUAL ACCESSES ARE DISABLED ; WE ARE NOT ACCESSING SHADOW MEMORY OR WRITIN ; CACHE INHIBIT MAP IF (VCC) EIPUR = /DOUBLE * LSHADOW * WRITE ; WRITING IN SHADOW IN REX MODE WILL MASK AWAY ; THE PROTECT BITS IF (VCC) EIPU = WCHIM ; PASS PAGE NUMBER TO BE INHIBITED FROM IDB + DOUBLE * LSHADOW * CA0 ; SHADOW ACCESSES IN SEX MODE + DOUBLE * LSHADOW * WRITE ; WRITING IN SHADOW IN SEX MODE WILL WRITE A F ; BIT PAGE NUMBER IF (VCC) EIPL = WCHIM ; PASS PAGE NUMBER TO BE INHIBITED FROM IDB + DOUBLE * LSHADOW * CA0 ; SHADOW ACCESSES IN SEX MODE + LSHADOW * WRITE ; WRITING LOWER BYTE (SAME FOR REX AND SEX) IF (VCC) EPTI = LSHADOW * /EMCL * WRITE ; DISABLE DURING EMCL TO AVOID JAMMING THE IDB + LSHADOW * /EMCL * /DOUBLE ; ENABLE ONLY WHEN IN SHADOW + LSHADOW * /EMCL * /CA0 ; DISABLE WHEN IN SEX MODE WE ARE READ/ FETCHIN ; ADDRESSES. (USE OTHER SRAM BLOCK). IF (VCC) EPMAP = /WCHIM * /DVACC * /WRITE ; DISABLE WHEN WRITING THE CACHE INHIBIT MAP + /WCHIM * /DVACC * /LSHADOW ; DISABLE WHEN VIRTUAL ACCESS IS DISABLED AN + /WCHIM * /DVACC * /DOUBLE ; ACCESSING SHADOW MEMORY EITHER. + /WCHIM * /DVACC * CA0 ; DISABLE ON SHADOW MEMORY WRITE IN SEX MODE + /WCHIM * LSHADOW * /WRITE ; ADRESSES. + /WCHIM * LSHADOW * /DOUBLE + /WCHIM * LSHADOW * CA0 IF (VCC) EPT = /WRITE * /EMCL ; DISBALE ON EMCL OR + /LSHADOW * /EMCL ; WRITING IN OTHER HALF + /DOUBLE * /EMCL ; WHEN IN SEX MODE + /CA0 * /EMCL DESCRIPTION ; 25/2/87 JLB EQUATION FOR EPT MISSING ; 18/5/87 3202B