PAL16R4
ADGD 18/8/86
44445B,9G,CADEC
CPU ADDRESS DECODER FOR 4MB MEMORY

CK WRITE /IORQ /MOFF PPN19 PPN20 PPN21 PPN22 PPN23 GND
/CGNT ECREQ /CRQ /MWRITE BANK0 BANK1 BANK2 /CLRQ /MSIZE0 VCC

MWRITE := WRITE

IF (VCC) CLRQ = ECREQ * /IORQ * /PPN23 * /PPN22 * /PPN21 * /PPN20 * /MOFF   ; EACH LINE R
                                                                            ; TO ALLOW MA
              + ECREQ * /IORQ * /PPN23 * /PPN22 * /PPN21 * PPN20 * /MOFF    ; IN THE ADDR
                                                                            ; THE 4MB (2M
                                                                            ; NEED NO HOL





IF (VCC) CRQ = ECREQ * IORQ                                                 ; ECREQ WILL HOLD UNT
             + ECREQ * MOFF
             + ECREQ * PPN23
             + ECREQ * PPN22
             + ECREQ * PPN21

/BANK0 := PPN21 + PPN20

/BANK2 := PPN21 + /PPN20

/BANK1 := /PPN21 + PPN20

MSIZE0 = VCC

DESCRIPTION

; 8/1-87JLB: NEW INPUT /MOFF TO DISBLE THE WHOLE MEMORY, PPN18 AND PPN19 REMOVED.
; 150387 JLB: WRITE WAS WRONG POLARITY.
; 150387 JLB: SPIKE GENERATOR REMOVED FROM CRQ.

; 180587 M3202B
; 060687 JLB: SWAPPED BANK1 AND BANK2 TO PROVIDE ENOUGH SPACE FOR PACKAGES.