PAL16R6
JLB 26NOV86
44601B, 12D, CYCFSM

OSC /DLY1 /DLY0 CSDELAY0 WAIT1 WAIT2 /CGNTCACT HIT /BRK GND
/OE /SHORT /CC3 /CC2 /CC1 /CC0 /TERM /CX /SLOW VCC

; CYCLE CONTROL STATE COUNTER. FAST VERSION (ND-120/CX).

CX := VCC;  THIS IS THE FAST VERSION


TERM := /CC3 * /CC2 * /CC1 * /CC0 * SHORT * /TERM * /DLY0 * /CSDELAY0   ; 50NS CYCLE
      + /CC3 * /CC2 * /CC1 * CC0 * SHORT * /BRK * /DLY1 * /TERM         ; 75NS CYCLE
      + /CC3 * /CC2 * /CC1 * CC0 * HIT * /BRK * /DLY1 * /TERM           ; 75NS CYCLE
      + /CC3 * /CC2 * CC1 * CC0 * SHORT * /BRK  * /TERM                 ; 100NS CYCLE
      + /CC3 * /CC2 * CC1 * CC0 * HIT * /BRK *  /TERM                   ; 100NS CYCLE
      + /CC3 * CC2 * CC1 * CC0 *  BRK *  /TERM                          ; BRK CYCLE       (>200
      + /CC3 * CC2 * /CC1 * CC0 * SLOW *  /TERM                         ; SLOW CYCLES INCL. FE
      + CC3 * /CC2 * /CC1 * /CC0 * /TERM                                ; UART,LCS,RWCS CYCLES

CC3 := CC2 * /CC1 * /CC0 * /TERM                                        ; h+i+j+k+l+m+n+o
     + CC3 * CC1 * /TERM * CC2
     + CC3 * CC1 * /TERM * /CC2
     + CC3 * CC0 * /TERM * CC2 * CC1
     + CC3 * CC0 * /TERM * /CC2 * CC1
     + CC3 * CC0 * /TERM * CC2 * /CC1
     + CC3 * CC0 * /TERM * /CC2 * /CC1

CC2 := /CC3 * CC2 * CC1 * /TERM                                        ; e+f+g+h+i+j+k
     + CC2 * /CC1 * /TERM * CC3
     + CC2 * /CC1 * /TERM * /CC3
     + CC2 * CC0 * /TERM * CC3
     + CC2 * CC0 * /TERM * /CC3
     + /CC3 * /CC2 * CC1 * /CC0 * CGNTCACT * /TERM              ; d WAIT FOR BUS IF
     + /CC3 * /CC2 * CC1 * /CC0 * /WAIT1 * /TERM                ; d WAIT1 and NOT
     + /CC3 * /CC2 * CC1 * /CC0 * BRK * /TERM                   ; d BRK

CC1 := /CC3 * /CC2 * CC0 * /TERM * CC1                          ; b+c+d+e+j+k+l+m
     + /CC3 * /CC2 * CC0 * /TERM * /CC1
     +  CC3 * CC2 * CC0 * /TERM * CC1
     +  CC3 * CC2 * CC0 * /TERM * /CC1
     +  CC1 * /CC0 * /TERM * CC2 * CC3
     +  CC1 * /CC0 * /TERM * CC2 * /CC3
     +  CC1 * /CC0 * /TERM * /CC2 * CC3
     +  CC1 * /CC0 * /TERM * /CC2 * /CC3

CC0 := /CC3 * /CC2 * /CC1 * /TERM                               ; a+b+f+i+j+m+N
     + /CC3 * CC2 * CC1 * CC0 * /TERM
     + CC3 * CC2 * /CC1 * /TERM
     + CC3 * /CC2 * CC1 * /TERM
     + /CC3 * CC2 * CC1 * /CC0 * /CGNTCACT * /TERM              ; e WAIT FOR BUS OR LOC
     + /CC3 * CC2 * CC1 * /CC0 * BRK * /TERM                    ; e MEM CYCLE TO FINISH
     + /CC3 * CC2 * CC1 * /CC0 * /WAIT2 * /TERM                 ; e IF WAIT2 and NOT BRK
     + /CC3 * /CC2 * CC1 * CC0 * CGNTCACT * /BRK * /TERM        ; e PREV WRITE

DESCRIPTION

; 060387 JLB: MOD’S FROM SLOW VERSION IMPLEMENTED.
; 060387 JLB: 100 NS CYCLE MIN. NO BUFFERED WRITE.
; 070387 JLB: 75 NS CYCLE MIN. NO BUFFERED WRITE.
; 120387 JLB: IMPROVED HIT PATH. FORM REMOVED. HIT INPUT ON PIN 12.
; SHORT IN ON PIN 4.
; 120387 JLB: 50 NS CYCLE ON SHORT
: 180387 JLB: MR GATED WITH WAIT1 OUTSIDE. NEW INPUT CSDELAY0.
: 180387 JLB: BUFFERED WRITE.
; 180387 JLB: 175NS SLOW & BRK CYCLES.
; 210387 JLB: 200NS SLOW CYCLES.

; 270487 M3202B
; 060887 JLB: MAXIMIZED EQUATIONS TO MATCH CLOCK SKEW.