PAL16R8 JLB/CJTC 11AUG86 44801A,10D, BARB OSC /CRQ /IORQ /MR /BRQ50 /REFRQ50 /BDRY25 /SEMRQ50 NC9 GND /OE /CACT /GNT /IOD /REF /MEM /DOREF /ACT /SEM VCC ; CACT - CPU IS ACTIVE ON THE ND100 BUS CACT := CRQ * /REFRQ50 * /BRQ50 * /REF * /GNT * /SEM * /BDRY25 * /MR ; 4 + CRQ * /REFRQ50 * DOREF * /REF * /GNT * /SEM * /BDRY25 * /MR ; 2 + CACT * /BDRY25 * /MR ; HOLD + CRQ * SEM * /GNT * /BDRY25 * /MR ; SEMAPHORE ; REF - REFRESH GRANT ON ND100 BUS REF := REFRQ50 * /CACT * /GNT * /SEM * /BDRY25 ; 1 + REF * /BDRY25 ; HOLD + REFRQ50 * MR ; ALWAYS GRANT REFRESH DURING MR ; GNT - GRANT ND100 BUS TO A DMA DEVICE OR EXTERNAL BUS CONTROLLER GNT := BRQ50 * /REFRQ50 * /CRQ * /REF * /CACT * /SEM * /BDRY25 * /MR ; 3 + BRQ50 * /REFRQ50 * /DOREF * /REF * /CACT * /SEM * /BDRY25 * /MR ; 3 + GNT * /BDRY25 * /MR ; HOLD + BRQ50 * SEM * GNT * /MR ; SEMAPHORE ; IOD - IO SIGNAL TO LAST FOR THE ENTIRE BUS CYCLE IOD := IORQ * CRQ * /REFRQ50 * /BRQ50 * /REF * /GNT * /SEM * /BDRY25 * /MR ; 4 + IORQ * CRQ * /REFRQ50 * DOREF * /REF * /GNT * /SEM * /BDRY25 * /MR ; 2 + IOD * /BDRY25 * /MR ; HOLD + IORQ * CRQ * SEM * /GNT * /BDRY25 * /MR ; SEMAPHORE ; MEM - MEM SIGNAL TO LAST FOR ENTIRE BUS CYCLE ; GENERATES BMEM WHICH IS PRESENT ON REFRESH, CPU MEMORY AND DMA CYCLES MEM := BRQ50 * /IORQ * /IOD * /BDRY25 * /MR + BRQ50 * /CRQ * /IOD * /BDRY25 * /MR + BRQ50 * /DOREF * /IOD * /BDRY25 * /MR + CRQ * /IORQ * /IOD * /BDRY25 * /MR + REFRQ50 * /IOD * /BDRY25 + REFRQ50 * MR + MEM * /BDRY25 * /MR ; SEM - SEMAPHORE GRANT SIGNAL SEM := SEMRQ50 * /MR * BDRY25 + SEM * /MR * /ACT ; ACT - BUS IS ACTIVE ACT := CACT * /BDRY25 * /MR + GNT * /BDRY25 * /MR + REF * /BDRY25 * /MR ; DOREF - INDICATES THAT LAST BUS CYCLE WAS A REFRESH DOREF := REF * /MR * BDRY25 + DOREF * /MR * /CACT * /GNT * /REF DESCRIPTION ; PRIORITY: ; 1. REFRESH : 2. CPU REQUEST AFTER A REFRESH ; 3. BUS REQUEST ; 4. CPU REQUEST ; 26/2-87JLB: WRONG HOLD TERM IN IOD. ; ; 180587 M3202B