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PROM Dumps

  • ND-120 PANEL - ONBOARD PANEL CONTROLLER - MC68705U3
  • ND-5000C Panel

ND-120 CPU BOARD - ONBOARD PANEL CONTROLLER - MC68705-U3

The panel controller drives the panel display (5 seven-segment digits through a Port C shift-register chain, per the ROM analysis), handles button presses and sends them to the CPU board, and reads the MM58274 calendar chip. The panel clock that SINTRAN uses is modelled in Verilog/CPU-BOARD-3202/circuit/PANCAL_68705_CLOCK.v (see Verilog/docs/panel-clock-68705.md).

Schematic

Sheet 40 of the CPU Board has the MC68705 connectins

Schematich for 68705

U3 Block Diaggram

68705 U3 Block Diaggram

U3 PROM

Binary PROM dump from MC68705-U3 on ND-120 CPU Board

U3 Analysis

Complete firmware analysis, checked against the ROM - ports, boot, timer ISR, the PANC command and response protocol, display, MM58274, RAM map. Earlier analysis notes were removed; section 17 of this file records what they got wrong.

U3 Dissasembly

PROM dump reverse engineered with Ghidra

68705-U3 Dissassembly PDF

U3 C code

Reverse engineered C code (draft): U3/u3_code/u3.c, U3/u3_code/u3.h. Where it disagrees with U3-COMPLETE.MD, the analysis is right (section 17).

The ND-5000C PANEL - MC68705-P3

Panel Operator including display

Panel Controller

The panel uses an MC68705P3 (Which is not the same as the U3 used on the ND-120 CPU board.) The 68705P3 is 28 pins with 3 ports (PORT A,B and C)

Reference NORSK-DATA.COM:

P3 PROM

Binary PROM dump from MC68705-R3

P3 Analysis

Analysis of the code in the R3 PROM

R3 Dissasembly

PROM dump reverse engineered with Ghidra

68705-P3 Dissassembly PDF

R3 C code

Reverse engineered C code (draft): P3/p3_code/p3.c (with p3.h, test_p3.c, Makefile). Where it disagrees with P3-COMPLETE.MD, the analysis is right (section 17).

6805 CPU doc

Panel ECO