ND-110¶
The ND-100 rebuilt from three custom chips. CPU and memory management on one board.
| Introduced | 1985 |
| Type | Base machine |
| Word length | 16-bit |
| Needs a host? | No, runs on its own |
| Replaced | ND-100 |
| Replaced by | ND-120/CX (1987) |
| Survivors | Not separately recorded |
The short version¶
Same instruction set and same performance class as the ND-100/CX, but built differently: three semi-custom VLSI gate arrays replace most of the discrete logic, which let ND put the CPU and the memory management on a single board and cut power from 90 watts to 60. It is the first ND machine designed around custom silicon, and the point where the control store became writable as standard.
Specification¶
| Item | Value |
|---|---|
| CPU | Three gate arrays plus PALs, all on one board with the MMS |
| RMAC | Address-arithmetic gate array - calculates the 16-bit virtual addresses. Replaces work the ND-100 did in microcode |
| BUFALU | 16-bit ALU gate array. Does the arithmetic and logic, and holds the current register set. Replaces four bit-slice processors |
| RMIC | Microinstruction sequencer. Replaces three 74S482 sequencers and about 30 other chips |
| Control store | 8K deep x 64 bits, writable as standard, in four 16-bit groups. Built from 4K x 4 bit 40 ns SRAM, loaded at power-up from two 32K x 8 EPROMs |
| Cache | Macro-instruction cache and a micro-instruction cache - the ND-100's mapping step disappears |
| Speed | 100 ns microinstruction cycle, minimum 1 microinstruction per instruction (ND-100: 150 ns and 3) |
| Interrupts | Synchronous interrupts handled as traps, like the ND-500 - a break from the ND-100 |
| Power | 60 watts for CPU and MMS together (ND-100: 90) |
| Clock | 39.3216 MHz crystal oscillator |
| Also on the card | Interrupt and trap handlers, real-time clock, operator panel interface, terminal 1 serial interface, register file, bus interface |
What was new¶
- Custom VLSI - the first ND machine built around its own gate arrays.
- Address arithmetic moved out of microcode into hardware (RMAC).
- Writable control store as standard, where the ND-100 had it as an option.
- A second, deeper cache at the microinstruction level.
- One microinstruction per instruction instead of three.
Configurations¶
| Machine | What differs |
|---|---|
| ND-110/CX | Faster version, 1986 - also called RASK |
| ND-110/PCX | Two ISA cards for a PC, used in the Butterfly |
| ND-110 Compact | Small cabinet |
| ND-110 Satellite | Small desk-side unit |
Sources¶
- Primary:
Reference-Manuals/ND-06.026-1-EN ND-110 Functional Description.md;ND-06.029.1 EN ND-110 Instruction Set.md - Secondary: ndwiki ND-100
Full context: MACHINE-TIMELINE.md.