ND-5200¶
An ND-5000 built as CPU type 1, with none.
| Introduced | 1987 |
| Type | Model of ND-5000 |
| Word length | 32-bit |
| Needs a host? | Yes - needs an ND-110 |
| Replaced | - |
| Replaced by | - |
| Survivors | Not recorded |
The short version¶
One of the ND-5000 models. On this line the model number is largely a configuration, not a different design: the CPU type, the master clock setting and which caches are enabled are what separate one model from the next. The ND-5200 is the entry model: CPU type 1 has no cache layer and no AAP, so floating-point operations are performed by the microprogram rather than by hardware.
Specification¶
| Item | Value |
|---|---|
| CPU type | 1 |
| CPU model number | 2 |
| I/O processor | ND-110 |
| Master clock | Normal (70 ns) |
| Caches enabled | None |
| Whetstone MIPS | Not rated separately |
| Architecture | As ND-500 |
Sources¶
- Primary:
Reference-Manuals/500/ND-05.020.01 EN ND-5000 Hardware Description.md - Primary: ND-SID001-A1-EN Sales Information Document, Dec 1986, via
SINTRAN/ND5000/ND5000-FAMILY-MODELS-REFERENCE.md - Secondary: ndwiki ND-5000 family
Full context: MACHINE-TIMELINE.md.