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Ethernet II Controller¶

ND-12.055.1 EN

Page 2¶

Ethernet II Controller¶

ND-12.055.1 EN

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Preface¶


The product	The Ethernet II controller (ND number 110063).
The reader	This manual is intended for all personnel who
	require information about the Ethernet II Controller.
Assumed background	The reader is assumed to have a general knowledge of digital hardware design.
The manual	This manual outlines the main features of the Ethernet controller and its installation. It is divided into the following three sections:

Introduction - a general overview, including an outline of the Ethernet protocol
The Controller - what it does and how
Installation - what you need to use and how to install the Controller

The appendices include a glossary of terms, Ethernet protocol details and an ND Ethernet product guide.

The following manuals may be useful:

ECMA 57/TC12/83/51 Technical Report TR19 - Local Area Networks Safety Requirements.

IEEE Std 802.3-1985 (ISO/DIS 8802/3) Carrier Sense Multiple Access with Collision Detection (CSMA/CD).

Data sheets for:

LANCE (Am7990) - AMD reference number 05698
SIA (Am7992B) - AMD reference number 03378
MFP (68901) - various vendors (Motorola, Mostek)

Ethernet is a trade mark of the Xerox Corporation.

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Notation¶

Term	Description
hex	Where possible hexadecimal notation of numbers has been used.
octal	Octal numbers, commonly used by ND-100 users, are denoted by the subscript: ₈
binary	Binary numbers have the subscript: ₂
bits	Bits within registers are also described using subscripts e.g. Ethernet control register ₂ is bit 2 of this register.
	In the COSMOS Monitor example (pages 45-9), the following notation is used:
highlight	Highlighted text will be displayed by the computer.
underline	Where underlined text is shown, information is to be entered by the user. ⏎ denotes carriage return.

Page 7¶

Chapter 4: Optical Properties of Materials¶

The optical properties of materials are crucial for various applications in technology and industry. This chapter covers the principles behind these properties, focusing on the interaction between light and matter.

4.1 Fundamental Concepts¶

Understanding optical properties requires knowledge of:

Refractive Index: Determines how much the speed of light is reduced inside a medium.
Absorption Coefficient: Measures how much light is absorbed when traveling through a material.
Reflectance and Transmittance: Describe how much light is reflected or transmitted at an interface.

4.2 Optical Phenomena¶

Several phenomena can occur when light interacts with materials:

Reflection: Light bouncing off a surface.
Refraction: Bending of light as it passes through materials of different refractive indices.
Scattering: Light reflected in multiple directions due to inhomogeneities.

4.3 Measurement Techniques¶

To evaluate optical properties, various techniques are employed:

Spectrophotometry: Measures the reflectance and transmittance as a function of wavelength.
Ellipsometry: Provides film thickness and refractive index information.
Microscopy: Used to study scattering and other micro-scale phenomena.

Table: Common Optical Properties¶

Property	Description
Refractive Index	Ratio of the speed of light in vacuum to that in the medium
Absorption	The reduction of the intensity of light within the medium
Reflectance	The fraction of incident light that is reflected
Transmittance	The fraction of incident light that passes through

This chapter also discusses advanced materials, including metamaterials and photonic crystals, which have engineered optical properties for specific applications.

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Table of Contents¶

1 INTRODUCTION¶

Topic	Page
Architecture	4
Ethernet protocol	6

2 THE CONTROLLER¶

Section	Page
68000 local processor	11
68000 interrupt levels	12
LANCE	13
- Error reporting	14
SIA	15
Local memory	16
Local DRAM	16
- DRAM access priority	16
- Byte parity on memory	17
- Parity errors	17
- Power failure	18
- Local SRAM - DRAM protection	19
EPROM	20
Address decoding	21
- Addresses of other devices in the I/O address space	22
Ethernet transceiver power control	25
Multifunction Peripheral (MFP)	26
- MFP after RESET and initialization	28
ND-100 interface	28
- Ethernet control register	29
- Ethernet status register	30

3 INSTALLATION¶

Section	Page
What you need	33
- Ethernet transceiver	34
- Fan-out unit	34
- Transceiver cable	34
- Coaxial cable	35
- Coaxial accessories	36
- Repeaters	37
- Point-to-point cable	38

Page 9¶

Contents¶

3.2 What to set¶

Thumbwheel selection of memory bank . . . . . . 40
Thumbwheel selection of Ethernet number . . . . 41

3.3 How to connect to the network¶

42

3.4 How to upgrade to an Ethernet II¶

44

3.5 Ethernet statistics¶

Description of COSMOS Monitor statistics . . . 47

Section	Description	Page
3.2	What to set	39
3.3	How to connect to the network	42
3.4	How to upgrade to an Ethernet II	44
3.5	Ethernet statistics	45

Page 10¶

Table of Appendices¶

Appendix A: GLOSSARY¶

51

Appendix B: ETHERNET PROTOCOL DETAILS¶

55

Topic	Page
Frame format	57
IEEE 802.3 - Ethernet differences	58
Frame terminology	58
Manchester encoding	62

Appendix C: ND ETHERNET PRODUCT GUIDE¶

63

Topic	Page
Ethernet accessories	65
OSI model and ND's implementation	66

Index¶

67

Page 11¶

Unit Tests for the Arithmetic Package¶

In this chapter, we will take a look at the unit tests of the arithmetic package. As the adversary may employ the standard built-in mathematical operations, the results obtained from those tests do not guarantee the correctness of the arithmetic package code.

Why Unit Tests?¶

Unit tests are a crucial part of software development because they help ensure that individual components of the application operate as expected. They should be atomic, independent from other tests, and easy to implement.

Preparing the Environment¶

To prepare the environment for unit testing, ensure that the arithmetic package is accessible in the test path. This can be achieved by proper configuration of the environment variables.

Setting Up Environment Variables¶

Variable	Description
`TEST_PATH`	Path to the directory containing test files
`PACKAGE_PATH`	Path to the arithmetic package

Ensure the TEST_PATH contains all relevant test scripts and test cases.

Running the Tests¶

The following steps should be executed to run the unit tests:

Compile the arithmetic package.
Navigate to the TEST_PATH.
Execute the test script.

Sample Test Execution¶

Here's a simple example of a test execution command:

./run_tests.sh

Upon execution, the test script will output results indicating success or failure of individual test units.

Conclusion¶

It is recommended to integrate these tests as part of the continuous integration pipeline to catch errors early in the development cycle.

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List of Figures¶

No.	Figure Description	Page
1	The implementation of Ethernet II - OSI standard	4
2	Block diagram of Ethernet II	5
3	Block diagram of the LANCE	13
4	Memory protection	19
5	The Multifunction Peripheral (MFP) block diagram	26
6	A point-to-point link	38
7	LED activity and thumbwheel selection on an Ethernet II card	39
8	Connecting to the Ethernet	42
9	A typical multi-station, multi-segment Ethernet	43
10	Upgrading from an Ethernet I	44
11	Calling Ethernet statistics from the COSMOS Monitor	45
12	Typical Ethernet statistics returned by the COSMOS Monitor	46
13	Examples of Manchester-encoded signals	62

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List of Tables¶

No.	Table Description	Page
1.	Addresses used in the I/O address space	22
2.	Thumbwheel selection of memory banks	40
3.	Thumbwheel selection of Ethernet address	41

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Chapter 1: Introduction¶

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Chapter 1 Introduction¶

The Ethernet II controller is implemented on a single-card for ND-100 based systems. The controller conforms to the IEEE 802.3 and ISO/DIS 8802/3 standards.

Systems using the two-card Ethernet I from Norsk Data can be upgraded to this single card option (see Section 3.4). ND-100 based systems can drive a maximum of four Ethernet II controllers.

This chapter outlines the basic features of the controller and of the protocol required for communicating on an Ethernet.

Page 19¶

Architecture¶

The Ethernet controller implements the three lowest layers of the OSI seven layer model for system communication. The network layer (level 3) is implemented by software running on the Ethernet controller with the controller's hardware and external transceiver implementing the data link and physical layers (levels 2 and 1).

A complete overview of the seven layers is given in Appendix C.

	Network Service
3	COSMOS Network Service
	Ethernet Network Service	software
2	IEEE 802.2 LLC
	IEEE 802.3 MAC
1	Physical Layer	hardware

LLC: Logical Link Layer
MAC: Medium Access Layer
COSMOS: proprietary software

Figure 1. The implementation of Ethernet II - OSI standard

Page 20¶

Chapter 1 Introduction¶

The Ethernet II controller has the following hardware architecture:

ND-100 interface	68000 local processor	local memory 512 Kbytes	parity check and error log

LANCE

SIA

isolation circuitry

transceiver cable

transceiver

coaxial cable
to Ethernet

Figure 2. Block diagram of Ethernet II

Page 21¶

Ethernet Protocol¶

Ethernet is a protocol designed for baseband local area networks (LANs). The network has a bus topology using an algorithm for bus access known as CSMA/CD (Carrier Sense Multiple Access with Collision Detection).

CSMA/CD¶

Access to the network is as follows:

All stations on the Ethernet continually listen to network activity.

A controller wishing to transmit waits for a quiet period (i.e. no activity on the network - none of the stations are transmitting) and begins to transmit.

Collision¶

If another station begins to transmit at almost the same time, the transmitted signals will collide and the data on the network becomes garbled.

The transmitting nodes detect this collision and continue to transmit for a predetermined length of time. This ensures that all the nodes on the network recognize that a collision has occurred. The nodes transmit a jam pattern of any pattern except that of the CRC. If the collision occurred during the preamble, the preamble is still sent followed by the jam pattern.

The action taken by a receiving controller during collision depends upon the time taken to detect the collision.

If within 4.8μs, an address mismatch has occurred, the packet will be rejected and the Silo pointer reset.

If within 51.2μs, the packet will be rejected as a runt packet.

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Chapter 1 Introduction¶

After 51.2μs, a late collision has occurred and the packet written into the Silo (the FIFO on the LANCE - see Section 2.2) but with the CRC error bit set.

The transmitting nodes then backoff, each delaying a random period of time before retransmitting. Sixteen attempts, with increasing timeout range, can be made by the controller before an error message is given due to excessive collisions on the network.

The frame formats of packets transmitted and received by the controller are given in Appendix B.

The Ethernet II controller conforms to the following protocol standards:

IEEE 802.3
ECMA 80/81/82
ISO/DIS 8802/3

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Chapter 2 The Controller¶

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CHAPTER 2 THE CONTROLLER¶

The controller is implemented on a single card featuring:

a 68000 local processor
a LANCE (Local Area Network Controller for Ethernet)
a SIA (Serial Interface Adapter)
local memory
Ethernet transceiver power control
a MFP (Multi-Function Peripheral controller)
ND-100 bus interface

2.1 68000 local processor¶

The 68000 is a 10 MHz, 16-bit processor dedicated to the I/O processing required by the Ethernet controller. Its basic control signals - HALT and RESET - are directly set by the ND-100.

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68000 Interrupt Levels¶

These are assigned as follows:

Level	Interrupt Source
7	ND-100 power low
6	ND-100 OPCOM
5	Parity error
4	Test console (PTC)
3	MFP (and ND-100) *
2	LANCE interrupt
1	Not used
0	Indicates no interrupt

see Section 2.4.5

Interrupt priority is assigned such that level 7 has highest priority and level 0 the lowest.

Detailed and introductory descriptions of the 68000 can be found in the vendors' manuals.

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Chapter 2 The Controller¶

2.2 LANCE¶

The LANCE (Local Area Network Controller for Ethernet - Am7990) is a single integrated circuit featuring:

on-board DMA and buffer management (48 byte FIFO known as a Silo)
network and packet error reporting
back-to-back packet reception
network diagnostics (see page 46):
- internal/external loopback
- CRC logic check
- time domain reflectometer

to the 68000

to the SIA


parallel bus interface	station address detection	retry logic	serial I/O interface
LANCE - CPU bus interface	DMA and microprogram store

C: control signals

Figure 3. Block diagram of the LANCE

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Chapter 2 The Controller¶

The LANCE operates in two modes:

transmit
receive

In transmit mode, the LANCE directly accesses data in memory and formats it into a packet for transmission (see Appendix B). The packet consists of:

preamble
sync pattern
data
32-bit CRC

The LANCE transmits the packet to the SIA. It loads the first byte of data into its Silo. Then, as the LANCE transmits the preamble to the SIA, it simultaneously loads the Silo with the remaining data.

In receive mode, packets are loaded into the Silo via the SIA. The CRC of the received data is calculated and compared and appended to the CRC field given by the packet. If the CRCs do not match, an error bit is set.

Error reporting¶

System errors reported by the LANCE include:

babbling transmitter (the transmitter is attempting to send more than 1518 data bytes)
collision (collision detection malfunctions)

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Chapter 2 The Controller¶

missed packet (insufficient buffer space)
memory timeout (25.6μs)

Packet errors include:

CRC (data invalid)
framing (the end of the packet was not on a byte boundary). This is also known as octet or alignment error.
overflow/underflow (slow response to a DMA request)
buffer (insufficient buffer space)

Detailed information on LANCE operation can be found in the vendors' manuals.

2.3 SIA¶

The SIA (Serial Interface Adapter - Am7992B) is a single integrated circuit featuring:

a Manchester encoder/decoder
collision detection

For transmission the SIA encodes the separate clock and NRZ data packet into a standard Manchester II serial bit stream (see Appendix B for a description of Manchester encoding).

For reception the SIA indicates to the LANCE that data is being received and separates the incoming Manchester-encoded data stream into clock and NRZ data.

Any collisions on the network are detected and signalled to the LANCE.

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2.4 Local memory¶

The local memory consists of:

512 Kbyte DRAM (dynamic RAM)
1 Kbit SRAM (static RAM)
128 Kbyte EPROM (future option)

2.4.1 Local DRAM¶

The local DRAM is accessible from the ND-100 as if it were any other ND-100 memory bank. The location of the DRAM in the ND-100 address space can be set by two thumbwheels located on the card edge (see section 3.2). The bank number of the card can be read back to the ND-100 using the IOXT instruction.

Messages between the controller and ND-100 can be transferred via special mailbox areas in the DRAM.

To pass messages, the Ethernet controller can interrupt the ND-100 and vice versa. The controller's control and status registers are under the direct control of the ND-100 (see section 2.4.6 for their description).

DRAM access priority¶

The priority of access to the DRAM is:

ND-100 (highest)
LANCE
68000 (lowest)

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Chapter 2 The Controller¶

Byte parity on memory¶

The DRAM includes a byte parity DRAM of 256K by 18 bits.

Parity errors¶

The Ethernet II has two parity error tests:

external
internal

external parity test¶

Here, the ND-100 generates an error which is reported.

Note
This test should only be used by ND-100 stand-alone programs. Tests under SINTRAN should only run after the memory has been tested.

The ND-100 executes the test as follows:

it disables the parity write by using an IOXT instruction to set the disable check bit in the Ethernet control register (bit 8). (See page 29.)
it then looks for the parity error signal on the bus when the error is detected
and sets the LED marked 'PERR' on (see Section 3.2). The LED is turned off by a RESET.

internal parity test¶

Here the 68000 generates parity errors and initiates an interrupt.

the 68000 writes a one to PARITYDIS, the parity disable register (address: EF0022) to disable parity write

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Chapter 2 The Controller¶

any parity error is reported by a level 5 interrupt to the 68000
the contents of PARITYDIS are read

If PARITYDIS is set together with BREAKMODE (address: EF0024), forced parity errors are used to set the breakpoint without changing the code. The parity error routine should read the BREAKMODE address to determine whether the parity error was a breakpoint or not.

Power failure¶

The DRAM and its refresh system are connected to the stand-by power supply so that the memory contents are preserved.

The ND-100 activates its Master Clear, a power failure sequence, on detecting the failure of its main power supply. This includes a power-low interrupt to the controller which resets the controller within approximately 50μs. The interrupt service routine for power-low saves all registers in the 68000 and drives the HALT and RESET signals low.

At the end of the Master Clear pulse, bus arbitration is reset and the 68000 becomes bus master. The SCIP (Status Change in PIOC) register on the Ethernet controller (see Section 2.4.3) is reset 200μs after power low by the Delayed Clear pulse.

The ND-100 restarts the controller by using an IOXT instruction, which results in the 68000 fetching the system stack pointer and restart address (held in the first eight bytes of DRAM). SINTRAN (the operating system) and PIOCOS cannot restart the controller in this manner.

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Chapter 2 The Controller¶

Local SRAM - DRAM protection¶

The SRAM protects the DRAM from being written to:

by input DMA.
by the 68000 user

The SRAM is a protect table for the controller's DRAM.

The DRAM is divided into memory segments of 512 bytes. Each segment has a corresponding bit in the SRAM which is either set or cleared to select memory protection or not.

Read and write access to a memory segment is gained by writing a one to the address of the segment concerned plus an offset address of 15360K. A zero protects the segment from access.

Address	Bit	Protection	Address
15360K + 3072	0	protected	3072
15360K + 2560	1	open	2560
15360K + 2048	0	protected	2048
15360K + 1536			1536

Figure 4. Memory protection

Attempting to access a protected area results in a bus error which will interrupt the 68000 with a write protect violation.

The protect table is established at system start-up. Programs running in 68000 Supervisor mode can access protected DRAM areas.

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Chapter 2 The Controller¶

2.4.2 EPROM¶

The 128K by 16 bit EPROM can only be accessed by the 68000. The EPROM is currently not used by the controller, so the boards are delivered with empty EPROM sockets. Future developments may implement EPROM.

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Chapter 2 The Controller¶

2.4.3 Address decoding¶

	In RAM mode:	In EPROM mode*:
FFFFFF
	RAM image	RAM image
F80000
F7FFFF	protect table	protect table
F00000
EF01FF	I/O space	I/O space
EF0000
EEFFFF
	spare	spare
81FFFF
800000	EPROM	DRAM
7FFFFF
	spare	spare
080000
07FFFF
	DRAM	DRAM
020000
01FFFF	DRAM	EPROM
000000

see previous section

RAM image
This area is always used by the ND-100. The LANCE and 68000 do have access.

Page 37¶

Addresses of other devices in the I/O address space¶

The I/O addresses within this region are decoded twice i.e. EF00XX = EF01XX, so that PIOC and Ethernet I software can be used.

address range	used by/as:	R/W
EF00C0 - EF00FF	MFP	R/W
EF00B8 - EF00BF	ETHSTAT	R
EF00B0 - EF00B7	LANRESET	W
EF00A8 - EF00AF	XCVPW	W
EF00A0 - EF00A7	LANCE	R/W
EF0080 - EF009F	SCIP	W
EF0060 - EF007F	EAREN	R
EF0040 - EF005F	MERRSTAT	R
EF0020 - EF003F	MODCR	R/W
EF0010 - EF001F	PROFF	W
EF0000 - EF000F	not used	-

R: read
W: write

Table 1. Addresses used in the I/O address space

MFP¶

Multi-Function Peripheral
The MFP uses the base address of EF00C0 plus a displacement of 1-55 (1-37 hex) to address all the registers within the MFP. ONLY ODD addresses are used to access the MFP.

ETHSTAT¶

Ethernet hardware status
These addresses read the current hardware status of the controller. Only two of the bits read are significant when ZERO:

bit	meaning
2	power enable
0	LAN interrupt

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Chapter 2 The Controller¶

LANRESET¶

LANCE hardware reset
Using an address in this range will initiate a hardware reset.

XCVPW¶

Transceiver 12 Volt power switch
Writing a one to this single-bit register will enable the 12 Volt power switch on the transceiver. Writing a zero, turns the power off.

LANCE¶

LANCE address space
Only two addresses are needed to address the LANCE. They are:

address	name
EF00A0	Register Data Port (RDP)
EF00A2	Register Address Port (RAP)

All accesses to the LANCE are 16-bit using even-byte addresses.

SCIP¶

Status Change In PIOC
Using this address range results in an interrupt on level 12 to the ND-100.

EAREN¶

Error Address Enable
Using this address range returns the address
(A_1-16) of a memory error on the 68000 data bus.

Page 39¶

MERRSTAT¶

Parity Error Enable¶

The information returned by these addresses has the format:

 15  11 10  5 4 3  0
 |    |    | | | |  |
 0    1    0 0 parity 0 0 info

bit	description
10	write to parity
9	address bit 18
8	address bit 17
7	NGACK ) error detected in *
6	BGACK ) read access *
3	parity error in high byte
2	parity error in low byte
1	parity bit read with high byte
0	parity bit read with low byte

Write to parity is enabled when the bit is zero; disabled when set.

The logic state of the following bits/signals determine which device detected an error in read access:

NGACK bit 7	BGACK bit 6	device
0	0	ND-100
0	1	none
1	0	LANCE
1	1	68000

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Chapter 2 The Controller¶

MODCR¶

Mode control register
This is addressed by:

address	description
EFO020	EPROMMODE
EFO022	PARITYDIS
EFO024	BREAKMODE
EFO026	SPARE

All four single-bit registers are cleared after RESET. Each register can be cleared by writing a zero or set by writing a one to its address.

PROFF
Protection Off
Writing a one into this address by a 68000 routine means the protect table contents are ignored.

2.4.4 Ethernet transceiver power control¶

A current switch monitors the D.C. current supplied to the transceiver from the ND-100 via the controller card. The current switch will disconnect the supply on controller command or when the current level could harm hardware or data integrity.

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Chapter 2 The Controller¶

2.4.5 Multifunction Peripheral (MFP)¶

The 68901 Multifunction Peripheral (MFP) combines many of the peripheral functions into one integrated circuit:

eight parallel I/O lines
interrupt controller for 16 sources
four timers
one full-duplex serial port for Asynchronous or Synchronous communication channel (USART)

A functional block diagram of the MFP is given below:

          +--------------------+
D        |                    |          Timers       
A        |     68000          |          C and D,        
  68000  |    interface       ----+      A and B         
interface|                    |             
       power and control      +---- Timer C       
                              |       = RTC               
                              |
        +--------------------+   
IACK    |                    |    
INTR   interrupt             ----+ 
       control                    |              
                              USART             to PCT 
    +-----------------------------+-----+   connector
    |  general purpose                  |                     
    |    I/O interrupts                 |                         
    +-----------------------------------+
    MFP

PCT: PIOC console terminal
RTC: real time clock

Figure 5. The Multifunction Peripheral (MFP) block diagram

Page 42¶

Chapter 2 The Controller¶

The MFP is used as follows:

USART

The USART is connected to a 10-pin PCT (PIOC console terminal) connector. When activated, the PCT interrupts the 68000 on interrupt level 5 via the MFP.

Timers A-D

Timer C is used as a real time clock (RTC). Timers A, B and D are not used.

Interrupts

The interrupts (I₀ - I₇) are assigned as follows:

interrupt	use
7	write violation
6	ND-100 interrupt
5	LANCE error *
4-0	not used

A LANCE error is generated when a memory cycle is stopped by any of the following:

protect violation
bus error
address out of range

Page 43¶

MFP after RESET and initialization¶

After RESET, all the MFP's registers except for timer registers are cleared. Software then re-initializes the registers. The interrupt vectors from the MFP to the 68000 are:

vector address	indicates:
117	write violation by 68000 *
116	ND-100 requesting interrupt *
114	receive buffer full
113	receive error
112	transmit buffer empty
111	transmit error
107	LANCE memory access error
105	RTC (real time clock)

* the ND-100 is the source

2.4.6 ND-100 interface¶

Messages between the controller and ND-100 can be transferred via mailbox areas in the DRAM.

To pass messages, the Ethernet controller can interrupt the ND-100 on interrupt level 12 and the ND-100 can interrupt the controller by setting the ND interrupt bit (Ethernet control register \(2\) - see following description).

The ND-100 will interrupt the controller on level 6 when the normal Ethernet/ND-100 communication path cannot be used.

The control and status registers are under the direct control of the ND-100.

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Chapter 2 The Controller¶

Ethernet control register¶

This is a 16-bit register controlling the following functions:

bit	function
15-9	not used
8	disable check bit
7	not used
6	power low
5	halt
4	reset
3	start OPCOM
2	ND interrupt
1	not used
0	enable SCIP interrupt

A Master Clear pulse from the ND-100 (or power-on) will set the controller's RESET and HALT signals and reset any local I/O activity.

The ND-100 starts controller activity by writing to the control register with the halt and reset bits cleared (zero).

The ND-100 writes to this register using an IOXT instruction. The Ethernet address of the controller plus 1 or 3 must be loaded into the T register before an IOXT is executed (see Section 3 - Thumbwheel selection of Ethernet address).

Page 45¶

Ethernet Status Register¶

This has the format:

bit	function
15-8	bank number
6	memory is 512 Kbytes *
5	halt
4	reset active
2	interrupt set for ND-100 on level 12
0	interrupt enabled onto ND-100 bus

always zero

Bank Number¶

Bits 8 and 9 are ALWAYS zero as the controller must start on a half-megabyte boundary i.e. the bank number is always a multiple of four.

The ND-100 reads this register using an IOXT instruction. The Ethernet address of the controller plus 0 or 2 must be loaded into the T register before an IOXT is executed (see Section 3 - Thumbwheel selection of Ethernet address).

Page 46¶

Chapter 3 Installation¶

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Page 48¶

Chapter 3 Installation¶

This section outlines how to install your Ethernet II card. It also offers some guidelines on network configuration and equipment requirements.

Note
All equipment using the Ethernet II controller must be to IEEE 802.3, ISO/DIS 8802/3 standards.

3.1 What you need¶

Controller to ND-100:

Ethernet II Controller
Ethernet/GPIB plug panel
internal cable between controller and plug panel

To establish an Ethernet network:

Ethernet transceiver(s)
fan-out unit(s)*
transceiver cable(s)
coaxial cable(s)
coaxial accessories
repeater(s)*
point-to-point cable(s)*

depends upon network size

Page 49¶

Ethernet transceiver¶

The transceiver is powered by the ND-100's 12 Volt D.C. supply via the Ethernet controller. A current switch will disconnect the power to the transceiver in the case of:

short circuit or excessive transceiver current consumption
low 5 Volt supply
a power off command from the controller

A power-off command is issued:

after jabber (data transmitted to jam the network)
as a result of a hanging transmitter
if the heartbeat is missing

Fan-out unit¶

A fan-out unit acts as a transceiver multiplexer, providing eight transceiver-type connections for DTEs (Data Terminal Equipment).

Transceiver cable¶

This cable links the transceiver to the Ethernet controller card via the ND-100's plug panel. The maximum cable length, i.e., distance between transceiver and controller, is 50m. It is a four-pair shielded cable, 75Ω impedance.

Note
The transceiver cable is called an AUI (Attachment Unit Interface) cable in IEEE 802.3 terminology.

Page 50¶

Chapter 3 Installation¶

Connectors¶

Cable to transceiver:

15 pin D-type sub-miniature female with slide lock assembly
Cinch type DA 51220-1 or equivalent

The transceiver must have a mating male connector with locking posts.

Cable to controller:

Male with locking posts
Cinch type DA 53018 or equivalent

This connector must mate with the female connector in the ND-100 plug panel.

Coaxial cable¶

The maximum segment length of coaxial cable is 500m. The cable is marked every 2.5m for correct transceiver installation. It has the following characteristics:

4 shields
Foamed dielectric
50Ω impedance
10.3mm thick
Propagation velocity: 0.77c
Supplied by one vendor only

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Chapter 3 Installation¶

Cable recommendations¶

The following lists, in order of preference, steps that can be taken to reduce signal reflections caused by cable discontinuities.

The cable segment should be made from one continuous cable.

If segments are built up from smaller sections, cable from the same manufacturer and preferably the same batch should be used.

If cable sections from different manufacturers are used, then standard lengths (23.4m, 70.2m, 117m) should be used.

An arbitrary configuration of the cable should only be used if the worst-case signal reflection at any point on the cable is less than 7% of the initial signal.

Coaxial accessories¶

The following accessories are required:

Male n-type coaxial connector at the end of every cable segment

Female jack with a 50Ω terminator at each end of the (composite) segment

A cable splice - female-female coaxial barrel connector - to join segments

All of these connectors must be electrically isolated from the building ground (rubber isolators are available for the Ethernet terminator and cable splice accessories).

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Chapter 3 Installation¶

Repeaters¶

A repeater must be used when more than one 500m cable segment is used. Two types of repeaters are available:

local repeater
remote repeater

A repeater ensures that valid data is transferred over a long distance on the Ethernet. It does this by:

regenerating preamble
extending collision fragments
carrying out automatic partitioning and reconnection in the event of a segment failure
allowing manual partitioning for segment servicing or reconfiguration

A local repeater is used for point-to-point links between cable segments within the same building.

A remote repeater is used for connections between buildings.

A maximum of two repeaters can be used in the path between any two stations connected to the Ethernet. However, more than two repeaters can be used providing the round-trip delay (51μs) is not exceeded.

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Chapter 3 Installation¶

Point-to-point cable¶

Coaxial segments in the same building can be joined by using a link segment of up to 1 km.

The link can be greater than 1 km providing the round-trip delay (5μs) is not exceeded.

The point-to-point cable consists of a double fibre optic cable terminated by 9mm SMA connectors at each end.

   |       fibre cable       |
   |——[⬛=========⬛]——|
  | coaxial         coaxial |
  | cable             cable  |

[⬛]  half repeater (BICC 1150)
⬛    transceiver
=    double fibre optic cable

Figure 6. A point-to-point link

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Chapter 3 Installation¶

3.2 What to set¶

    ▓ ▓ ▓        * * * *    *
7J 9J 12J      5 3 1 2    8

Ethernet II card
(component side)


C	B	A

key:

LED	colour	denotes
8	yellow	external 12V transceiver
5	red	memory parity error
3	yellow	active memory cycle
2	red	68000 halt
1	red	68000 reset

▓	thumbwheel	selects	page ref:
	7J,9J	memory bank number	40
	12J	Ethernet number	41

A,B,C edge connectors

Figure 7. LED activity and thumbwheel selection on an Ethernet II card

Page 55¶

Thumbwheel Selection of Memory Bank¶

The thumbwheels numbered 7J and 9J select the memory bank accessible to the controller. The thumbwheel numbers correspond to the memory segments as follows:

Thumbwheel 7J 9J	Bank Number	PIOC Address Space (Kbytes)	Physical Page (hex)
0 0-3	0	0 - 512	0 - FF
0 4-7	4	512 - 1024	100 - 1FF
0 8-11	8	1024 - 1536	200 - 2FF
0 12-15	12	1536 - 2048	300 - 3FF
1 0	16	2048 - 2560	400 - 4FF
...	...	...	...
etc. etc.	etc.	etc.	etc.

Table 2. Thumbwheel selection of memory banks

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Chapter 3 Installation¶

Thumbwheel selection of Ethernet number¶

An ND-100 can control four Ethernet controllers. The Ethernet address of a controller in the system must be set by thumbwheel 12J.

thumbwheel 12J	Ethernet number	Ethernet address (device number)	Ident Code
0	1	140360₈	140034₈
1	2	140364₈	140035₈
2	3	140370₈	140036₈
3	4	140374₈	140037₈

Table 3. Thumbwheel selection of Ethernet address

The Ethernet address (device number) given above is the base address, each controller is assigned four addresses, two for reading from and two for writing to the ND-100 (see Section 2.4.6).

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Chapter 3 Installation¶

3.3 How to connect to the network¶

       +-----------------+
       |      ND-100     |
       |-----------------|
       | Ethernet II     |
       | controller      |
       +-----------------+
            |
            | transceiver cable
            | 50m max. 
            |
x ---------.-------█---------------------x
<----------|--------------------------------->
      cable segment 500m max.

Symbol	Description
x	50Ω terminator with insulator
█	transceiver
●	cable splice with insulator
↔	standard lengths of coaxial cable (to a maximum of 500m)

Figure 8. Connecting to the Ethernet

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Chapter 3 Installation¶

Configuration:¶

        CS1        L1         CS2
        +---------+----------+
        |         |          |
    x--------+        +--------x
        |         |          |

            CS3        L2
        +---------+----------+
        |         |
    x--------+        +--------x
        |         |

Symbol	Description
▮	transceiver
□	cable splice
x	50Ω terminator
███	repeater (local or remote)
[ ]	station
L	▮------▮ link segment
CS	x------x cable segment

Figure 9. A typical multi-station, multi-segment Ethernet

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Chapter 3 Installation¶

3.4 How to upgrade to an Ethernet II¶

Ethernet II Upgrade Diagram

Figure 10. Upgrading from an Ethernet I

Remove the Ethernet I Master and Controller cards.
Remove the cable linking the B-connectors.
Insert the Ethernet II card in the slot that was occupied by the Ethernet I Controller card (slot y).
Reset the thumbwheel settings of any I/O cards above the Ethernet memory space.
If any DMA request sources are installed at slot numbers greater than the Ethernet controller, insert a dummy plug linking the following connector signals in the slot once occupied by the Ethernet I Master (slot x):

INGARANT OUTGRANT

INIDENT OUTIDENT
Run configuration test.
Reinstall COSMOS Ethernet option.

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Chapter 3 Installation¶

3.5 Ethernet statistics¶

A monitor program can be run as follows:

@<UTI>ENCOS-MON

------------------------------------------------------
COSMOS ETHERNET MONITOR  
VERSION xxx  
FOR ND-110063 ETHERNET II  
(type HELP for list of available commands)  
------------------------------------------------------
ENTER COMMAND: STAT
  get statistics  
  server number (0/1/2/3): 0  
  system name: name of system  
  source of statistics is specified by integer code as follows:  
  O => MA Logical Address statistics  
  N => Network Server Statistics for connection to system N  
  specify statistics source (O/N): O  
  MA stats  
  via physical copy (Y/N): N

Figure 11. Calling Ethernet statistics from the COSMOS Monitor

where xxx represents the current version number of the COSMOS Monitor.

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Chapter 3 Installation¶

This will return the statistics for Ethernet server 0. The following is an example of statistics reported to the terminal. The text which is not highlighted is a cross-reference to the relevant registers in the LANCE (it is NOT reported to the terminal).

Ethernet MA Statistics for Local System¶

Statistic	Value
frames transmitted successfully	263
including after one collision	0
and after multiple collisions	0
frames aborted (excess collisions)	0
frames received and given to user	263
received and dropped	0
missed	0
CRC errors	0
alignment errors	0
FIFO overflows	0
buffer overflows	0
bad MA length field	0
loss of carrier during transmit	0
transmit underflow	0
late collision	0
bad length received	0
bad address received	0
missing transceiver heartbeat	0
jabber detected	1
memory error	0
hung transmit state	0
restarts	0

CSR, TMD, and RMD¶

	CSR	TMD
0	TINT	ONE
	TINT	MORE
	TINT	RTRY
	RINT
*	RINT
	MISS


CRC
FRAM
OFLO
BUFF
LCAR
UFLO
LCOL
CERR
BABL
MERR

CSR: Control and Status Register
RMD: Receive Message Descriptor
TMD: Transmit Message Descriptor
*: statistic determined by the 68000

Figure 12. Typical Ethernet statistics returned by the COSMOS Monitor

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Chapter 3 Installation¶

Description of COSMOS Monitor statistics¶

frames transmitted successfully
This is the number of successfully transmitted frames.

frames transmitted successfully after one collision
This the number of frames that required one retry to transmit the packet.

frames transmitted successfully after multiple collisions
This the number of frames that required more than one retry to transmit the packet.

frames aborted
This is the number of frames aborted. The transmitter has failed after sixteen retries to transmit the frame.

frames received and given to the user
This is the number of successfully received frames.

frames received and dropped
The number of frames dropped after reception if the ENNS buffer space is full.

frames missed
This is the number of times the receiver lost a packet.

CRC errors
This is the number of CRC errors detected by the receiver.

alignment errors
This is the number of alignment or framing errors received. The error is flagged when a received packet contains a non-integer multiple of eight bits and a CRC error.

FIFO overflows
This is the number of times the Silo overflowed.

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Chapter 3 Installation¶

resulting in all or part of the incoming packet being lost.

Buffer overflows¶

A buffer overflow is detected when either the Silo overflow occurred before the LANCE received the next status information or the LANCE does not own the next buffer whilst data-chaining a received packet.

bad MA length field¶

This is the number of received frames with a field length inconsistent to that in the DMA command byte.

loss of carrier during transmit¶

This is the number of times the carrier input signal to the LANCE (RENA) has been lost whilst the LANCE was transmitting. The LANCE continues to transmit the packet but will not retry if transmission fails.

transmit underflows¶

This is the number of times the transmitter has truncated a message due to late data being received from memory. In this case, the Silo is emptied before the end of the packet was reached.

late collision¶

The number of collisions that occurred after the slot time.

bad length received¶

The number of incorrect length fields received.

bad address received¶

The number of incorrect addresses received.

missing transceiver heartbeat¶

This is the number of times a collision occurring after LANCE transmission fails to activate the LANCE within 2μs.

jabber detected¶

This is the number of times a transmitter timeout error has occurred. This timeout occurs

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Chapter 3 Installation¶

when the transmitter has been on the channel longer than the time required to send the maximum packet length.

memory error¶

This error is set when the LANCE, as a Bus Master, has not received a READY signal in response to an address. This error turns the LANCE transmitter and receiver off.

hung transmit state¶

The number of one second software timeouts on awaiting transmit commands.

restarts¶

The number of restarts given by the ND-100 to the 68000.

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Appendix A¶

Glossary¶

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Appendix A Glossary¶

Term	Definition
backoff	The time a transmitting node waits before retransmitting after a collision.
68000	16-bit microprocessor
c	speed of light in a vacuum (3 x 10^8 ms^-1)
CPU	Central Processing Unit
CRC	Cyclic Redundancy Checksum
CSMA/CD	Carrier Sense Multiple Access/Collision Detect
DMA	Direct Memory Access
Ethernet	A protocol for communicating between devices on a Local Area Network.
Ethernet I	An Ethernet controller for ND-100 systems based on a two card solution (Ethernet master and a controller).
frame	packet + preamble
FIFO	First-In, First-Out (called Silo as implemented within the LANCE).
heartbeat	A signal generated by a transceiver to indicate it is operative. This is also known as SQE.
IEEE	Institute of Electrical and Electronic Engineers (U.S.A.)
ISO	International Standards Organisation
jam	Nodes jam the network by transmitting simultaneously to ensure all nodes know a collision has occurred on the network.
LAN	Local Area Network

Page 69¶

Appendix A Glossary¶

Term	Definition
LANCE	Local Area Network Controller for Ethernet
LED	Light Emitting Diode
ND-100 series	The family of 16-bit general purpose computers from Norsk Data consisting of the following: ND-100 ND-100/CE ND-100/CX ND-100 Compact ND-100 Satellite ND-110/CE ND-110/CX
node	An access point to (or a device on) the Ethernet.
NRZ	Non-Return-to-Zero...a type of data encoding.
OPCOM	OPerator COMmunication...direct communication with the ND-100 CPU.
OSI	Open Systems Interconnection
packet	Significant information within the Ethernet frame (destination address to FCS fields).
PIOC	Programmable Input/Output Controller
preamble	preamble + sync (or SFD)
segment	in memory...512K of contiguous memory of a cable...fixed length of cable.
SIA	Serial Interface Adapter
SQE	Signal Quality Error (see heartbeat)

Page 70¶

Appendix B Ethernet Protocol Details¶

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Appendix B Ethernet Protocol Details¶

Frame Format¶

IEEE 802.3		Ethernet
preamble	..............	preamble
SFD 10101011₂	64 bits	sync 11₂
destination address	6 bytes	destination address
source address	6 bytes	source address
length	2 bytes	type
data	46-1500 bytes	data
pad
FCS		FCS

Page 73¶

IEEE 802.3 - Ethernet differences¶

Frame terminology¶

An IEEE 802.3 and Ethernet frame should be identical. Each protocol divides the frame into fields with different names. A short description of the field terminology is given below.

Each octet (byte) in the frame is transmitted/received low-order bit first (see FCS). Transmission/reception begins with the preamble field.

Term	Description
preamble	A sequence of bits transmitted to synchronize clocks and other devices on the network. The bit pattern is alternate ones and zeros (1010...10). An Ethernet frame transmits a further six bits as preamble compared to the IEEE 802.3 (equivalent to the first six bits of the SFD).
SFD - IEEE 802.3	Start Frame Delimiter. This is a byte of data indicating the start of a frame (information) after the preamble. The byte is always 10101011 (IEEE 802.3 only).
sync - Ethernet	An Ethernet sync field consists of two bits both set to one.

Note
The actual bit pattern of the preamble and SFD (IEEE 802.3) will be the same as the preamble and sync (Ethernet).

Page 74¶

Appendix B Ethernet Protocol Details¶

Source Address¶

This six byte field specifies the station sending the frame. It has the format:

byte	1	2	3	4	5	6
hex value	08	00	26	LB	HB	00

The first three bytes are the global ND address. A number unique to ND Ethernet equipment and registered with the IEEE and ISO.

The next two bytes are the high and low bytes (HB and LB) of an ND system.

The last byte is zero.

Destination Address¶

This six byte field specifies the station(s) for which the frame is intended.

The first two bits have the following significance:

bit	value	type of address
0	0	individual
	1	group *
1	0	global
	1	local/broadcast

a group address can select none, one, more than one or all stations.

Length - IEEE 802.3¶

This two byte field gives the number of data bytes in the frame. If the number of data bytes is less than 64 bytes a pad field is added to allow the shorter data field to be received.

Type - Ethernet¶

This two byte field specifies the type of packet. Packet length is supplied by the LANCE during reception.

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Appendix B Ethernet Protocol Details¶

Data¶

This is Manchester-encoded data (see next section).

FCS¶

Frame Check Sequence
A cyclic redundancy check (CRC) is used by the transmit and receive algorithms to monitor any corruption of information received/transmitted on the Ethernet. The FCS (Frame Check Sequence) field of the frame will contain the frame's CRC value.

The CRC is calculated from the following frame fields:

source address
destination address
length (type)
data
pad

Note: The low-order bit transmitted/received first of the FCS is the most significant term of the CRC polynomial and the high-order bit the least significant.

Page 76¶

Appendix B Ethernet Protocol Details¶

Manchester Encoding¶

The separate data and clock signals are encoded by making, at the centre of a bit cell:

a positive-going transition for a logical ONE
a negative-going transition for a logical ZERO

and

a transition at each cell boundary between consecutive bit cells of the same value.

Three examples of a Manchester-encoded bit stream are given below:


0	0	0	0	0	0
1	1	1	1	1	1
0	0	1	0	1	1

Figure 13. Examples of Manchester-encoded signals

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Page 78¶

Appendix C - ND Ethernet Product Guide¶

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Page 80¶

Appendix C ND Ethernet Product Guide¶

Ethernet accessories¶

ND Number	Product Name
107700	Transceiver cable, 5m
107710	Transceiver cable, 15m
107720	Ethernet 50Ω terminator
107730	Ethernet cable splice
107740	Ethernet transceiver
107750	Local repeater package
107760	Ethernet coaxial cable, 23.4m
107770	Ethernet coaxial cable, 70.2m
107780	Ethernet coaxial cable, 117m
107790	Remote repeater package
107830	Fan out unit package

A includes 1 repeater, 2 transceivers and two transceiver cables
B includes 2 repeaters, 2 transceivers and two 15m transceiver cables

Page 81¶

Appendix C ND Ethernet Product Guide¶

OSI Model and ND's Implementation¶

Layer
7	COSMOS	ISO Applications	FTP Telnet
6			nil
5	XMSG		nil
4	ISO TC.4		ARPA TCP*
3	LNCN	ISO CNLSNL (inactive subset)	ARPA IP
2	LLC1
			LLC1
	MAC		DIX
1	Physical

to be implemented late 1987 by Ethernet II

Glossary¶

DIX: Digital-Intel-Xerox specified protocol
ARPA: Advanced Research Projects Agency
LLC: Logical Link Control
CNLSNL: Connectionless Network Layer
LNCN: Local Network COSMOS Network Layer
MAC: Media Access Control

Page 82¶

Index¶

Term	Page
Angular Velocity	37
Angular Momentum	38
Torque	42
Kinematics	45
Dynamics	50
Conservation Laws	54
Energy	57
Work	60

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Page 84¶

Index¶

68000
11, 17, 18, 20, 53
interrupt levels 12

68901
see Multifunction Peripheral (MFP) 26

access
read 19
write 19

address
    decoding     21
    destination     59
    error     48
    Ethernet     29, 30, 41
    global ND     59
    I/O space     22
    offset     19
    source     59

alignment error 15, 47

babbling transmitter 14

backoff 7, 53

bank number 16, 30

BREAKMODE 18

breakpoint 18

buffer space 15

bus error 19

c 53

cable
    recommendations     36
    cable segment     36, 54
    cable splice     36

cable type
    coaxial     33, 35
    point-to-point     38
    point-to-point     33
    transceiver     33, 34

coaxial cable 33, 35

Page 85¶

Index¶

collision¶

late . . . . . . . . . . . . . . . . . . . 6, 14
7, 48

COSMOS¶

. . . . . . . . . . . . . . . . . . . . . . . 4

COSMOS Ethernet Monitor¶

how to run it . . . . . . . . . . . . . . 45
statistics . . . . . . . . . . . . . . . . 46

CPU¶

. . . . . . . . . . . . . . . . . . . . . . . 53

CRC¶

. . . . . . . . . . . . . . . . . . . . . . 6, 13-15, 53, 60
error . . . . . . . . . . . . . . . . . . 47

CSMA/CD¶

. . . . . . . . . . . . . . . . . . . . . . 6, 53

current switch¶

. . . . . . . . . . . . . . . . . . . . . . 34

disable check bit¶

. . . . . . . . . . . . . . . . . . . . . . 17

DMA¶

. . . . . . . . . . . . . . . . . . . . . . . 53

DRAM¶

access priority . . . . . . . . . . . . 16
address . . . . . . . . . . . . . . . . 16
byte parity . . . . . . . . . . . . . . 17
protection . . . . . . . . . . . . . . 19

EAREN¶

. . . . . . . . . . . . . . . . . . . . . . . 22

ECMA 80/81/82¶

. . . . . . . . . . . . . . . . . . . . . . . 7

EPROM¶

. . . . . . . . . . . . . . . . . . . . . . . 16, 20

EPROM mode¶

. . . . . . . . . . . . . . . . . . . . . . . 21

errors¶

alignment . . . . . . . . . . . . . . . 15
CRC . . . . . . . . . . . . . . . . . . . 47
frame . . . . . . . . . . . . . . . . . . 47
octet . . . . . . . . . . . . . . . . . . 15
packet . . . . . . . . . . . . . . . . . 15
system . . . . . . . . . . . . . . . . . 14

Ethernet¶

. . . . . . . . . . . . . . . . . . . . . . . 53
protocol . . . . . . . . . . . . . . . . 6

Ethernet address¶

. . . . . . . . . . . . . . . . . . . . . 41

Ethernet control register¶

. . . . . . . . . . . . . . . . . . . . . 17, 29

Ethernet I¶

. . . . . . . . . . . . . . . . . . . . . . . 53

Ethernet II¶

block diagram . . . . . . . . . . . . . 5
communication architecture . . . . 4
hardware . . . . . . . . . . . . . . . . 5
implementation . . . . . . . . . . . . 11
installation . . . . . . . . . . . . . . . 33
statistics . . . . . . . . . . . . . . . . . 45

Ethernet protocol¶

. . . . . . . . . . . . . . . . . . . . . . . 57

Ethernet status register¶

. . . . . . . . . . . . . . . . . . . . . . . 30

Page 86¶

Index¶

Ethernet transceiver
power control ................................ 11

Ethernet/GPIB plug panel ................. 33
ETHSTAT .................................. 22

fan-out unit ............................. 33
FCS ...................................... 60
fibre optic cable ........................ 38
FIFO ..................................... 7, 13, 47, see Silo, 53

frame .................................... 53
format ....................................... 57
statistics ................................... 47
terminology .................................. 58

frame errors ............................. 47
framing .................................. 15
future option ............................ 16

half-repeater ............................ 37
HALT ..................................... 11, 18, 29
heartbeat .................................... 34, 53
missing ...................................... 48

I/O address space ........................ 22
IEEE ..................................... 53
IEEE 802.3 ............................... 3, 7, 33
internal cable ........................... 33
interrupts ............................... 16
IOXT instruction ......................... 16, 18
ISO ...................................... 53

ISO model
Ethernet II layers ........................... 4

ISO/DIS 8802/3 ........................... 3, 7, 33
isolators ................................ 36

jabber ................................... 34, 48
jam ...................................... 6, 34, 53

LAN ...................................... 53

Page 87¶

Index¶

LANCE¶

error reporting . . . . . . . . . . . . . . . 14
features . . . . . . . . . . . . . . . . . . . 13
operation . . . . . . . . . . . . . . . . . . 14

LANCE error¶

LANCE error . . . . . . . . . . . . . . . . . . 27
LANRESET . . . . . . . . . . . . . . . . . . . . 22
LED . . . . . . . . . . . . . . . . . . . . . . 17, 54

Length¶

error . . . . . . . . . . . . . . . . . . . . . . 48
length field . . . . . . . . . . . . . . . . . 59, 60

LLC¶

LLC . . . . . . . . . . . . . . . . . . . . . . 4

Local Memory and Processor¶

local memory . . . . . . . . . . . . . . . . . . 11
local processor (68000) . . . . . . . . . . . . 11
local repeater . . . . . . . . . . . . . . . . . 37

MAC¶

MAC . . . . . . . . . . . . . . . . . . . . . . 4

Mailbox and Error¶

mailbox . . . . . . . . . . . . . . . . . . . . 16, 28
Manchester encoder/decoder . . . . . . . . . 15
master clear . . . . . . . . . . . . . . . . . . 18, 29

Memory¶

error . . . . . . . . . . . . . . . . . . . . . . 49
segment . . . . . . . . . . . . . . . . . . . . 19, 54
timeout . . . . . . . . . . . . . . . . . . . . 15

MERRSTAT and Messages¶

MERRSTAT . . . . . . . . . . . . . . . . . . . . 22
messages . . . . . . . . . . . . . . . . . . . . . 16

MFP¶

MFP . . . . . . . . . . . . . . . . . . . . . . . 11, 22
missed packet . . . . . . . . . . . . . . . . . 15

MODCR and Multifunction Peripheral¶

MODCR . . . . . . . . . . . . . . . . . . . . . 22
Multifunction Peripheral (MFP) . . . . . . . . 26

ND-100¶

bus interface . . . . . . . . . . . . . . . . . 11
series . . . . . . . . . . . . . . . . . . . . . 54

Additional Terms¶

node . . . . . . . . . . . . . . . . . . . . . . 54
NRZ . . . . . . . . . . . . . . . . . . . . . . . 15, 54
octet error . . . . . . . . . . . . . . . . . . 15
offset address . . . . . . . . . . . . . . . . 19
OPCOM . . . . . . . . . . . . . . . . . . . . . 54
OSI . . . . . . . . . . . . . . . . . . . . . . 54
OSI reference model . . . . . . . . . . . . . 4, 66
overflow/underflow . . . . . . . . . . . . . . 15, 48

Page 88¶

Index¶

Item	Page(s)
packet	14, 54
errors	15
missed	15
runt	7
packet errors	47
pad field	60
parity error
forced	18
tests	17
PARITYDIS	17
PCT	26, 27
PIOC	54
point-to-point cable	33, 38
power failure	18
power off command	34
power-low interrupt	18
preamble	6, 54, 58
PROFF	22
protect table	19
RAM mode	21
receive mode	14
remote repeater	37
repeater	33, 37
half	37
local	37
maximum number	37
remote	37
RESET	11, 17, 18, 29
power failure	18
SCIP	18, 22
segment
cable	36, 54
memory	19, 54
SFD
Start Frame Delimiter	58
SIA	11, 14, 15, 54
Silo	6, 13, 14, 47, 48, 53
slot time	48
SQE	54
sync field	58

Page 89¶

Index¶

System¶

errors ........................... 14

terminator ...................... 36
thumbwheel ...................... 16
12J ............................. 41
7J .............................. 40
9J .............................. 40
timeout
software ....................... 49
transceiver ..................... 34
disconnection ................. 34
transceiver cable ............... 33, 34
transmit mode ................... 14
type field ...................... 59, 60

USART¶

USART ........................... 27

Write Protect Violation¶

write protect violation ......... 19
interrupt ..................... 27

XCVPW¶

XCVPW ........................... 22

Page 90¶

Updating¶

Manuals can be updated in two ways, new versions and revisions. New versions consist of a completely new manual which replaces the old one, and incorporate all revisions since the previous version. Revisions consist of one or more single pages to be merged into the manual by the user, each revised page being listed on the new printing record sent out with the revision. The old printing record should be replaced by the new one.

New versions and revisions are announced in the ND Customer Support Information and can be ordered from the address below.

The reader's comments form at the back of this manual can be used both to report errors in the manual and give an evaluation of the manual. Both detailed and general comments are welcome.

Printing Record¶

Printing	Notes
7/87	Version 1

ND-12.055.1 EN
Ethernet II Controller

Ring Binder or Plastic Cover¶

The manual can be placed in a ring binder for greater protection and convenience of use. Ring binders may be ordered at a price of NKr. 45.- per binder.

The manual may also be placed in a plastic cover. This cover is more suitable for manuals of less than 100 pages than for larger manuals.

Please send your order, as well as all types of inquiries and requests for documentation to the local ND office, or (in Norway) to:

Graphic Center
Norsk Data A.S
P.O.Box 25 BØGERUD
N-0621 OSLO 6 - Norway

I would like to order

......... Ring Binders, B5, at NOK 35.- per binder

......... Ring Binders, A4, at NOK 45.- per binder

......... Plastic Covers, A4, at NOK 10.- per cover

Name: ................................................................

Company: ..........................................................

Address: ............................................................

Page 91¶

SEND US YOUR COMMENTS!¶

Are you frustrated because of unclear information in our manuals? Do you have trouble finding things?

Please let us know if you: - find errors - cannot understand information - cannot find information - find needless information.

Do you think we could improve our manuals by rearranging the contents? You could also tell us if you like the manual.

Send to:
Norsk Data A.S
Documentation Department
P.O. Box 25 BOGERUD
N - 0621 OSLO 6 - Norway

NOTE!¶

This form is primarily for documentation errors. Software and system errors should be reported on Customer System Reports.

Manual Name:	Manual number:

Which version of the product are you using?

What problems do you have? (use extra pages if needed)

Do you have suggestions for improving this manual?

Your name:	Date:

Company:	Position:

Address:

What are you using this manual for?

Page 92¶

I'm unable to convert images with no text to text or Markdown since this page only contains graphic elements. If you need help on something else, feel free to ask!

Page 1¶

Ethernet II Controller¶

Page 2¶

Ethernet II Controller¶

Page 3¶

Page 4¶

Preface¶

Related manuals¶

Page 5¶

Page 6¶

Notation¶

Page 7¶

Chapter 4: Optical Properties of Materials¶

4.1 Fundamental Concepts¶

4.2 Optical Phenomena¶

4.3 Measurement Techniques¶

Table: Common Optical Properties¶

Page 8¶

Table of Contents¶

1 INTRODUCTION¶

2 THE CONTROLLER¶

3 INSTALLATION¶

Page 9¶

Contents¶

3.2 What to set¶

3.3 How to connect to the network¶

3.4 How to upgrade to an Ethernet II¶

3.5 Ethernet statistics¶

Page 10¶

Table of Appendices¶

Appendix A: GLOSSARY¶

Appendix B: ETHERNET PROTOCOL DETAILS¶

Appendix C: ND ETHERNET PRODUCT GUIDE¶

Index¶

Page 11¶

Unit Tests for the Arithmetic Package¶

Why Unit Tests?¶

Preparing the Environment¶

Setting Up Environment Variables¶

Running the Tests¶

Sample Test Execution¶

Conclusion¶

Page 12¶

List of Figures¶

Page 13¶

Page 14¶

List of Tables¶

Page 15¶

Page 16¶

Chapter 1: Introduction¶

Page 17¶

Page 18¶

Chapter 1 Introduction¶

Page 19¶

Architecture¶

Page 20¶

Chapter 1 Introduction¶

Page 21¶

Ethernet Protocol¶

CSMA/CD¶

Collision¶

Page 22¶

Chapter 1 Introduction¶

Page 23¶

Page 24¶

Chapter 2 The Controller¶

Page 25¶

Page 26¶

CHAPTER 2 THE CONTROLLER¶

2.1 68000 local processor¶

Page 27¶

68000 Interrupt Levels¶

Page 28¶

Chapter 2 The Controller¶

2.2 LANCE¶

Page 29¶

Chapter 2 The Controller¶

Error reporting¶

Page 30¶

Chapter 2 The Controller¶