A02

Source: Verilog/Shared/ndlib/A02.v

Where it sits (Simulation): ND120_TOP > ND120_CORE > ND3202D > CPU_15 > CPU_PROC_32 > CPU_PROC_CGA_33 > CGA > CGA_TRAP > CGA_TRAP_BRKDET > A02 - instance path: CORE.CPU_BOARD.CPU.PROC.CGA.DELILAH.TRAP.BRKDET.A02_1

Used in: CGA_MAC_ADD (all tops), CGA_MAC_AP09 (all tops), CGA_MAC_LA1025 (all tops), CGA_TRAP_BRKDET (all tops), CGA_WRF_RBLOCK_SEL16 (all tops)

Contains: no other modules.

Module hierarchy - All modules

Schematic

Drawn from the Verilog: the yosys netlist of the Simulation (Verilator) build, instance CORE.CPU_BOARD.CPU.PROC.CGA.DELILAH.TRAP.BRKDET.A02_1. Sub-modules are boxes (click the picture to open it full size; there every sub-module box links to its page, and every wire shows its Verilog name).

Description

ND120 CPU, MM&M CGA A02 component Used in CHG/ALU page 61 From Lasse Bockelie: AO2 is an And Or Invert gate. So 2 And followed by an Or gate and then inverted. The function is a selector (multiplexer) of each of the 4 16-bit signal groups. AO2 was a component of LSI Logic's library on Daisy. The symbol for it was like in your drawing, but we didn't have room for that. We could also make our own components on Daisy, so I made the shrunken one. As you can see, there wasn't even room for the title field on this page Last reviewed: 09-NOV-2024 Ronny Hansen

Ports

Direction	Width	Name	Description
input	1	A
input	1	B
input	1	C
input	1	D
output	1	Z

Verilog source

Verilog/Shared/ndlib/A02.v on GitHub.

Show the Verilog of A02 (33 lines)

/***************************************************************************************
** ND120 CPU, MM&M                                                                    **
** CGA A02 component                                                                  **
** Used in CHG/ALU page 61                                                            **
**                                                                                    **
** From Lasse Bockelie:                                                               **
**                                                                                    **
** AO2 is an And Or Invert gate. So 2 And followed by an Or gate and then inverted.   **
** The function is a selector (multiplexer) of each of the 4 16-bit signal groups.    **
**                                                                                    **
** AO2 was a component of LSI Logic's library on Daisy.                               **
** The symbol for it was like in your drawing, but we didn't have room for that.      **
** We could also make our own components on Daisy, so I made the shrunken one.        **
** As you can see, there wasn't even room for the title field on this page            **
**                                                                                    **
** Last reviewed: 09-NOV-2024                                                         **
** Ronny Hansen                                                                       **
****************************************************************************************/


module A02 (
    input  A,
    input  B,
    input  C,
    input  D,
    output Z
);


  assign Z = ~((A & B) | (C & D));

endmodule